| Server IP : 104.21.38.3 / Your IP : 172.71.124.72 Web Server : Apache System : Linux krdc-ubuntu-s-2vcpu-4gb-amd-blr1-01.localdomain 5.15.0-142-generic #152-Ubuntu SMP Mon May 19 10:54:31 UTC 2025 x86_64 User : www ( 1000) PHP Version : 7.4.33 Disable Function : passthru,exec,system,putenv,chroot,chgrp,chown,shell_exec,popen,proc_open,pcntl_exec,ini_alter,ini_restore,dl,openlog,syslog,readlink,symlink,popepassthru,pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wifcontinued,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority,imap_open,apache_setenv MySQL : OFF | cURL : ON | WGET : ON | Perl : ON | Python : OFF | Sudo : ON | Pkexec : ON Directory : /usr/src/linux-headers-5.15.0-143/arch/mips/include/asm/mach-ralink/ |
Upload File : |
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Ralink SoC register definitions
*
* Copyright (C) 2013 John Crispin <[email protected]>
* Copyright (C) 2008-2010 Gabor Juhos <[email protected]>
* Copyright (C) 2008 Imre Kaloz <[email protected]>
*/
#ifndef _RALINK_REGS_H_
#define _RALINK_REGS_H_
#include <linux/io.h>
enum ralink_soc_type {
RALINK_UNKNOWN = 0,
RT2880_SOC,
RT3883_SOC,
RT305X_SOC_RT3050,
RT305X_SOC_RT3052,
RT305X_SOC_RT3350,
RT305X_SOC_RT3352,
RT305X_SOC_RT5350,
MT762X_SOC_MT7620A,
MT762X_SOC_MT7620N,
MT762X_SOC_MT7621AT,
MT762X_SOC_MT7628AN,
MT762X_SOC_MT7688,
};
extern enum ralink_soc_type ralink_soc;
extern __iomem void *rt_sysc_membase;
extern __iomem void *rt_memc_membase;
static inline void rt_sysc_w32(u32 val, unsigned reg)
{
__raw_writel(val, rt_sysc_membase + reg);
}
static inline u32 rt_sysc_r32(unsigned reg)
{
return __raw_readl(rt_sysc_membase + reg);
}
static inline void rt_sysc_m32(u32 clr, u32 set, unsigned reg)
{
u32 val = rt_sysc_r32(reg) & ~clr;
__raw_writel(val | set, rt_sysc_membase + reg);
}
static inline void rt_memc_w32(u32 val, unsigned reg)
{
__raw_writel(val, rt_memc_membase + reg);
}
static inline u32 rt_memc_r32(unsigned reg)
{
return __raw_readl(rt_memc_membase + reg);
}
#endif /* _RALINK_REGS_H_ */