Server IP : 104.21.38.3 / Your IP : 172.71.124.155 Web Server : Apache System : Linux krdc-ubuntu-s-2vcpu-4gb-amd-blr1-01.localdomain 5.15.0-142-generic #152-Ubuntu SMP Mon May 19 10:54:31 UTC 2025 x86_64 User : www ( 1000) PHP Version : 7.4.33 Disable Function : passthru,exec,system,putenv,chroot,chgrp,chown,shell_exec,popen,proc_open,pcntl_exec,ini_alter,ini_restore,dl,openlog,syslog,readlink,symlink,popepassthru,pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wifcontinued,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority,imap_open,apache_setenv MySQL : OFF | cURL : ON | WGET : ON | Perl : ON | Python : OFF | Sudo : ON | Pkexec : ON Directory : /usr/src/linux-headers-5.15.0-142/arch/openrisc/include/asm/ |
Upload File : |
/* * Copyright (C) 2014 Stefan Kristiansson <[email protected]> * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any * kind, whether express or implied. */ #ifndef __ASM_OPENRISC_ATOMIC_H #define __ASM_OPENRISC_ATOMIC_H #include <linux/types.h> /* Atomically perform op with v->counter and i */ #define ATOMIC_OP(op) \ static inline void arch_atomic_##op(int i, atomic_t *v) \ { \ int tmp; \ \ __asm__ __volatile__( \ "1: l.lwa %0,0(%1) \n" \ " l." #op " %0,%0,%2 \n" \ " l.swa 0(%1),%0 \n" \ " l.bnf 1b \n" \ " l.nop \n" \ : "=&r"(tmp) \ : "r"(&v->counter), "r"(i) \ : "cc", "memory"); \ } /* Atomically perform op with v->counter and i, return the result */ #define ATOMIC_OP_RETURN(op) \ static inline int arch_atomic_##op##_return(int i, atomic_t *v) \ { \ int tmp; \ \ __asm__ __volatile__( \ "1: l.lwa %0,0(%1) \n" \ " l." #op " %0,%0,%2 \n" \ " l.swa 0(%1),%0 \n" \ " l.bnf 1b \n" \ " l.nop \n" \ : "=&r"(tmp) \ : "r"(&v->counter), "r"(i) \ : "cc", "memory"); \ \ return tmp; \ } /* Atomically perform op with v->counter and i, return orig v->counter */ #define ATOMIC_FETCH_OP(op) \ static inline int arch_atomic_fetch_##op(int i, atomic_t *v) \ { \ int tmp, old; \ \ __asm__ __volatile__( \ "1: l.lwa %0,0(%2) \n" \ " l." #op " %1,%0,%3 \n" \ " l.swa 0(%2),%1 \n" \ " l.bnf 1b \n" \ " l.nop \n" \ : "=&r"(old), "=&r"(tmp) \ : "r"(&v->counter), "r"(i) \ : "cc", "memory"); \ \ return old; \ } ATOMIC_OP_RETURN(add) ATOMIC_OP_RETURN(sub) ATOMIC_FETCH_OP(add) ATOMIC_FETCH_OP(sub) ATOMIC_FETCH_OP(and) ATOMIC_FETCH_OP(or) ATOMIC_FETCH_OP(xor) ATOMIC_OP(add) ATOMIC_OP(sub) ATOMIC_OP(and) ATOMIC_OP(or) ATOMIC_OP(xor) #undef ATOMIC_FETCH_OP #undef ATOMIC_OP_RETURN #undef ATOMIC_OP #define arch_atomic_add_return arch_atomic_add_return #define arch_atomic_sub_return arch_atomic_sub_return #define arch_atomic_fetch_add arch_atomic_fetch_add #define arch_atomic_fetch_sub arch_atomic_fetch_sub #define arch_atomic_fetch_and arch_atomic_fetch_and #define arch_atomic_fetch_or arch_atomic_fetch_or #define arch_atomic_fetch_xor arch_atomic_fetch_xor #define arch_atomic_add arch_atomic_add #define arch_atomic_sub arch_atomic_sub #define arch_atomic_and arch_atomic_and #define arch_atomic_or arch_atomic_or #define arch_atomic_xor arch_atomic_xor /* * Atomically add a to v->counter as long as v is not already u. * Returns the original value at v->counter. * * This is often used through atomic_inc_not_zero() */ static inline int arch_atomic_fetch_add_unless(atomic_t *v, int a, int u) { int old, tmp; __asm__ __volatile__( "1: l.lwa %0, 0(%2) \n" " l.sfeq %0, %4 \n" " l.bf 2f \n" " l.add %1, %0, %3 \n" " l.swa 0(%2), %1 \n" " l.bnf 1b \n" " l.nop \n" "2: \n" : "=&r"(old), "=&r" (tmp) : "r"(&v->counter), "r"(a), "r"(u) : "cc", "memory"); return old; } #define arch_atomic_fetch_add_unless arch_atomic_fetch_add_unless #define arch_atomic_read(v) READ_ONCE((v)->counter) #define arch_atomic_set(v,i) WRITE_ONCE((v)->counter, (i)) #include <asm/cmpxchg.h> #define arch_atomic_xchg(ptr, v) (arch_xchg(&(ptr)->counter, (v))) #define arch_atomic_cmpxchg(v, old, new) (arch_cmpxchg(&((v)->counter), (old), (new))) #endif /* __ASM_OPENRISC_ATOMIC_H */