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/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2017 Chen Liqin <[email protected]> * Copyright (C) 2012 Regents of the University of California */ #ifndef _ASM_RISCV_CACHE_H #define _ASM_RISCV_CACHE_H #define L1_CACHE_SHIFT 6 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) /* * RISC-V requires the stack pointer to be 16-byte aligned, so ensure that * the flat loader aligns it accordingly. */ #ifndef CONFIG_MMU #define ARCH_SLAB_MINALIGN 16 #endif #endif /* _ASM_RISCV_CACHE_H */