| Server IP : 104.21.38.3 / Your IP : 104.23.175.81 Web Server : Apache System : Linux krdc-ubuntu-s-2vcpu-4gb-amd-blr1-01.localdomain 5.15.0-142-generic #152-Ubuntu SMP Mon May 19 10:54:31 UTC 2025 x86_64 User : www ( 1000) PHP Version : 7.4.33 Disable Function : passthru,exec,system,putenv,chroot,chgrp,chown,shell_exec,popen,proc_open,pcntl_exec,ini_alter,ini_restore,dl,openlog,syslog,readlink,symlink,popepassthru,pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wifcontinued,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority,imap_open,apache_setenv MySQL : OFF | cURL : ON | WGET : ON | Perl : ON | Python : OFF | Sudo : ON | Pkexec : ON Directory : /usr/src/linux-headers-5.15.0-143/arch/sparc/include/asm/ |
Upload File : |
/* SPDX-License-Identifier: GPL-2.0 */
/* io-unit.h: Definitions for the sun4d IO-UNIT.
*
* Copyright (C) 1997,1998 Jakub Jelinek ([email protected])
*/
#ifndef _SPARC_IO_UNIT_H
#define _SPARC_IO_UNIT_H
#include <linux/spinlock.h>
#include <linux/pgtable.h>
#include <asm/page.h>
/* The io-unit handles all virtual to physical address translations
* that occur between the SBUS and physical memory. Access by
* the cpu to IO registers and similar go over the xdbus so are
* translated by the on chip SRMMU. The io-unit and the srmmu do
* not need to have the same translations at all, in fact most
* of the time the translations they handle are a disjunct set.
* Basically the io-unit handles all dvma sbus activity.
*/
/* AIEEE, unlike the nice sun4m, these monsters have
fixed DMA range 64M */
#define IOUNIT_DMA_BASE 0xfc000000 /* TOP - 64M */
#define IOUNIT_DMA_SIZE 0x04000000 /* 64M */
/* We use last 1M for sparc_dvma_malloc */
#define IOUNIT_DVMA_SIZE 0x00100000 /* 1M */
/* The format of an iopte in the external page tables */
#define IOUPTE_PAGE 0xffffff00 /* Physical page number (PA[35:12]) */
#define IOUPTE_CACHE 0x00000080 /* Cached (in Viking/MXCC) */
/* XXX Jakub, find out how to program SBUS streaming cache on XDBUS/sun4d.
* XXX Actually, all you should need to do is find out where the registers
* XXX are and copy over the sparc64 implementation I wrote. There may be
* XXX some horrible hwbugs though, so be careful. -DaveM
*/
#define IOUPTE_STREAM 0x00000040 /* Translation can use streaming cache */
#define IOUPTE_INTRA 0x00000008 /* SBUS direct slot->slot transfer */
#define IOUPTE_WRITE 0x00000004 /* Writeable */
#define IOUPTE_VALID 0x00000002 /* IOPTE is valid */
#define IOUPTE_PARITY 0x00000001 /* Parity is checked during DVMA */
struct iounit_struct {
unsigned long bmap[(IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 3)) / sizeof(unsigned long)];
spinlock_t lock;
iopte_t __iomem *page_table;
unsigned long rotor[3];
unsigned long limit[4];
};
#define IOUNIT_BMAP1_START 0x00000000
#define IOUNIT_BMAP1_END (IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 1))
#define IOUNIT_BMAP2_START IOUNIT_BMAP1_END
#define IOUNIT_BMAP2_END IOUNIT_BMAP2_START + (IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 2))
#define IOUNIT_BMAPM_START IOUNIT_BMAP2_END
#define IOUNIT_BMAPM_END ((IOUNIT_DMA_SIZE - IOUNIT_DVMA_SIZE) >> PAGE_SHIFT)
#endif /* !(_SPARC_IO_UNIT_H) */